A conventional active matrix substrate used for a wiring substrate of a liquid crystal display device, includes thin film transistors (TFTs) as switching elements. FIG. 7 is a circuit diagram showing the structure of the conventional active matrix substrate. This conventional active matrix substrate includes gate signal lines 24 and source signal lines 26 arranged to intersect at right angles on a surface of a transparent insulating substrate, and TFTs 23 and picture element capacitors 22 corresponding to the respective intersections of these signal lines. The gate signal line 24 is connected to the gate electrode of the TFT 23, and the TFT 23 corresponding to a picture element is driven by a scanning signal input to the gate electrode from the gate signal line 24.
The source signal line 26 is connected to the source electrode of the TFT 23 to allow an input of a data signal to the source electrode. A picture element electrode and one of the terminals of the picture element capacitor 22 are connected to the drain electrode of the TFT 23. The other terminal of the picture element capacitor 22 is connected to a picture element capacitor wire 25. The picture element capacitor wire 25 is connected to a common electrode (not shown) mounted on a facing substrate in the case of a liquid crystal display device.
FIG. 8 illustrates the planar structure of the above-mentioned conventional active matrix substrate, and FIGS. 9 and 10 show the cross sectional structure thereof. As illustrated in FIG. 9, this active matrix substrate is constructed by layering a gate electrode 32, a gate insulating film 33, a semiconductor layer 34, a channel protecting layer 35, an n.sup.+ amorphous silicon layer 36 functioning as a source and a drain, an ITO film 37 functioning as source and drain electrodes, a metal film layer 38 as a source signal line, an inter-layer insulating film 39, and a transparent conductive layer as a pixel electrode 41 in this order on a transparent insulating substrate 31.
As shown in FIGS. 8 and 10, the pixel electrode 41 is connected to the ITO film 37 as the drain electrode of the TFT through a contact hole 40 formed in the inter-layer insulating film 39. As a material of the inter-layer insulating film 39, for example, a photosensitive acrylic resin is used. The inter-layer insulating film 39 having the contact hole 40 is formed by applying the photosensitive acrylic resin, and subjecting the acrylic resin to the exposure, alkali development, and hardening by heat.
In this structure, since the inter-layer insulating film 39 is formed between the pixel electrode 41 and the gate and source signal lines, it is possible to overlap the pixel electrode 41 and these signal lines. Overlapping the pixel electrode 41 and these signal lines enables shielding of an electric field caused by the signal lines, thereby preventing alignment defects of liquid crystals.
A liquid crystal cell can be fabricated by further forming an alignment film 46 on the pixel electrode 41 of the above-mentioned active matrix substrate, fastening the active matrix substrate and a facing substrate fabricated by forming a black matrix 43, a color filter 44, a common electrode 45 and the alignment film 46 in this order on a surface of a transparent insulating substrate 42, and introducing liquid crystals 47 between these substrates.
Japanese Publication for Unexamined Patent Application (Tokukaihei) No. 5-249494 (1993) discloses a technique for preventing a lowering of the display contrast due to leakage of light by restraining a reverse tilt domain by forming the contact hole 40 so that the tilt angle .alpha. (see FIG. 10) of the slant face of the contact hole 40 is not greater than 60.degree.. It is also disclosed in this publication that the leakage of light is more effectively prevented by arranging the tilt angle a of the slant face of the contact hole 40 not to be greater than 45.degree..
It is recited in the publication (Tokukaihei) No. 5-249494 (1993) above that the depth of the contact hole 40, i.e., the thickness of the inter-layer insulating film 39, is preferably not more than 2 .mu.m, and more preferably not more than 1 .mu.m in order to produce sufficient effects by the formation of the contact hole 40 with a slant face whose tilt angle is not greater than 60.degree..
However, the pixel electrode 41 produces a parasitic capacitance with the source signal line (metal film layer 38), gate electrode 32 and gate signal line through the inter-layer insulating film 39. Since the parasitic capacitance is in inverse proportion to the thickness of the inter-layer insulating film 39, the parasitic capacitance increases as the thickness becomes smaller. An increase in the parasitic capacitance causes a vicious effect on the display quality of the liquid crystal cell.
On the other hand, when the thickness of the inter-layer insulating film 39 is increased to decrease the parasitic capacitance, if the slant face of the contact hole 40 is tilted at an angle not greater than 45.degree., the area of the opening of the contact hole 40 becomes larger. As a result, the occurrence of leakage of light would increase. Alternatively, the need of forming a wider auxiliary capacitance signal line 49 arises to block the leakage of light. The increase in the width of the auxiliary capacitance signal line 49 causes a lowering of the aperture ratio of the liquid crystal cell.
Considering the above-mentioned problems, it is a main object of the present invention to find a tilt angle of the contact hole which gives suitable results with regard to the aperture ratio of the liquid crystal cell and the display quality, and to provide a fabrication process which achieves such a suitable tilt angle.